CHARGE LOSS TRACKING THROUGH TARGETED BIT COUNT

Memory cells may store multiple bits per cell. For example, three-level cell (TLC) memory stores three bits per cell using eight voltage levels. The number of memory cells at each voltage is approximately the total number of cells divided by the number of voltage levels. The number of memory cells a...

Ausführliche Beschreibung

Gespeichert in:
Bibliographische Detailangaben
Hauptverfasser: Yadav, Tarun Singh, Shukla, Pitamber, Kientz, Steven Michael
Format: Patent
Sprache:eng
Schlagworte:
Online-Zugang:Volltext bestellen
Tags: Tag hinzufügen
Keine Tags, Fügen Sie den ersten Tag hinzu!
Beschreibung
Zusammenfassung:Memory cells may store multiple bits per cell. For example, three-level cell (TLC) memory stores three bits per cell using eight voltage levels. The number of memory cells at each voltage is approximately the total number of cells divided by the number of voltage levels. The number of memory cells above a certain read voltage is the CFByte value for the read voltage. Based on a difference between the CFByte value and a target CFByte value for the read voltage, an adjustment value is determined. Characteristics of an individual memory device may be determined by finding several CFByte values for a small range of read voltages. Using the gathered CFByte values, a DAC adjustment value is determined for the individual memory device.