DATA REFRESH CYCLE FOR ASYNCHRONOUS DEVICE COMMUNICATION

DATA REFRESH CYCLE FOR ASYNCHRONOUS DEVICE COMMUNICATION

An asynchronous communication system configured to operate a MIL-1553 protocol. The system includes: a bus; a bus controller coupled to the bus that is configured to control access to the bus; a remote terminal connected to the bus; a device controller connected to the remote terminal; and a read/wr...

Ausführliche Beschreibung

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Bibliographische Detailangaben
Hauptverfasser: Kaliyannan Eswaran, Pravinsharma, Nallathambi, Annamalai, Moon, Sneha Ashok, Bhosle, Akansha
Format: Patent
Sprache:eng
Schlagworte:
CALCULATING
COMPUTING
COUNTING
ELECTRIC DIGITAL DATA PROCESSING
PHYSICS
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Beschreibung
Zusammenfassung:An asynchronous communication system configured to operate a MIL-1553 protocol. The system includes: a bus; a bus controller coupled to the bus that is configured to control access to the bus; a remote terminal connected to the bus; a device controller connected to the remote terminal; and a read/write overlap avoidance latch connected to the remote terminal. The read/write overlap avoidance latch provides an active signal to the device controller that prevents the device controller from writing data to the remote terminal while the bus controller is reading data from the device controller during a read cycle.