NOR Memory Array, NOR Memory and Electronic Device

Disclosed are NOR memory array, NOR memory and electronic device. The NOR memory array comprises: multiple vertical memory groups arranged in n rows and m columns on a horizontal plane, one vertical memory group includes at least h vertically stacked memory transistors, where n, m, and h are natural numbers greater than 1, wherein, the memory transistors in one vertical memory group share a vertically extended columnar gate structure, part or all of columnar gate structures of vertical memory groups in a same row are connected to a same word line, part or all of memory transistors located at a same stack layer in vertical memory groups in a same column are connected to a same bit line, and an isolation part, for isolating active areas and bit lines of the memory transistors in the adjacent columns, is arranged between adjacent columns of the vertical memory groups.