ENHANCED SERIAL PERIPHERAL INTERFACE

A bus system, including a clock line, a first data line, and a second data line. The bus system further includes an initiator connected to a first end of the clock line, the first data line, and the second data line. The initiator sends a start indication on the clock line and the first data line, s...

Ausführliche Beschreibung

Bibliographische Detailangaben

Hauptverfasser:	Murari, Sharad, Gaddam Mupkal, Ajay Kumar Reddy, Jaramillo, Kenneth, Andi Thevar, Sundarapandian
Format:	Patent
Sprache:	eng
Schlagworte:	CALCULATING COMPUTING COUNTING ELECTRIC DIGITAL DATA PROCESSING PHYSICS
Online-Zugang:	Volltext bestellen
Tags:	Tag hinzufügen Keine Tags, Fügen Sie den ersten Tag hinzu!