INTEGRATED CIRCUITS, SYSTEMS, AND METHODS FOR MULTIPLE-PRECISION MULTIPLY-AND-ACCUMULATE OPERATION

Multiple-precision multiply-and-accumulate operation is performed by a multiply-and-accumulate (MAC) unit configured to operate in an integer mode to perform computations on first data-width integer values to produce third data-width integer values and configured to operate in a floating point mode...

Ausführliche Beschreibung

Gespeichert in:
Bibliographische Detailangaben
Hauptverfasser: CHERLAPALLY, Anudeep, VILCHEZ, Antonio Tomas Nevado, NEZ, Nikolay
Format: Patent
Sprache:eng
Schlagworte:
Online-Zugang:Volltext bestellen
Tags: Tag hinzufügen
Keine Tags, Fügen Sie den ersten Tag hinzu!
Beschreibung
Zusammenfassung:Multiple-precision multiply-and-accumulate operation is performed by a multiply-and-accumulate (MAC) unit configured to operate in an integer mode to perform computations on first data-width integer values to produce third data-width integer values and configured to operate in a floating point mode to perform computations on second data-width floating point values to produce third data-width floating point values, wherein the second data width is twice the first data width and the third data width is larger than the second data width. The MAC unit includes a first multiplier configured to multiply two integer values in the integer mode or multiply mantissa values extracted from each of two floating point values in the floating point mode. The MAC unit further includes a second multiplier, and is further configured to multiply two integer values in the integer mode or refrain from using the second multiplier in the floating point mode.