DUMMY SILICON STIFFENING MECHANISM FOR MODULE WARPAGE MITIGATION

DUMMY SILICON STIFFENING MECHANISM FOR MODULE WARPAGE MITIGATION

Embodiments disclosed herein include electronic packages. In an embodiment, the electronic package comprises a substrate with a first surface and a second surface opposite from the first surface. In an embodiment, a plurality of first dies are coupled to the first surface of the substrate, and a bum...

Ausführliche Beschreibung

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Bibliographische Detailangaben
Hauptverfasser: LIM, Min Suet, STOECKL, Stephan, GOH, Eng Huat, NAGARAJAN, Kavitha
Format: Patent
Sprache:eng
Schlagworte:
BASIC ELECTRIC ELEMENTS
ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
ELECTRICITY
SEMICONDUCTOR DEVICES
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Beschreibung
Zusammenfassung:Embodiments disclosed herein include electronic packages. In an embodiment, the electronic package comprises a substrate with a first surface and a second surface opposite from the first surface. In an embodiment, a plurality of first dies are coupled to the first surface of the substrate, and a bump field is on the second surface of the substrate. In an embodiment, the bump field comprises a voided region towards a center of the substrate. In an embodiment, a second die is coupled to the second surface of the substrate, where the second die is provided in the voided region.