SEMICONDUCTOR PACKAGE AND METHOD OF MANUFACTURING THE SAME

Provided is a semiconductor package with enhanced reliability and a method of manufacturing the same. The semiconductor package includes a package substrate including a body layer having a central area and a peripheral area, a first protective layer on a top surface of the body layer, and a second protective layer on the first protective layer in the peripheral area, a semiconductor chip mounted on the first protective layer in the central area in a flip-chip structure, an underfill in a gap between the first protective layer and the semiconductor chip and in a gap between the connection terminals, an interposer on the semiconductor chip, and inter-substrate connection terminals on the peripheral area of the package substrate and electrically connecting the package substrate to the interposer, where the underfill has an anchor structure extending into the first protective layer.