DEVICE LAYOUT DESIGN FOR IMPROVING DEVICE PERFORMANCE

The present disclosure relates an integrated chip. The integrated chip includes an isolation region disposed within a substrate and surrounding an active area. A gate structure is disposed over the substrate and has a base region and a gate extension finger protruding outward from a sidewall of the...

Ausführliche Beschreibung

Bibliographische Detailangaben

Hauptverfasser:	Tsai, Chun-Lin, Chang, Shih-Pang, Wu, Haw-Yun, Chang, Yao-Chung
Format:	Patent
Sprache:	eng
Schlagworte:	BASIC ELECTRIC ELEMENTS ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ELECTRICITY SEMICONDUCTOR DEVICES
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