ETCH STOP LAYER FOR MEMORY DEVICE FORMATION

The present disclosure relates to an integrated chip in some embodiments. The integrated chip includes an inter-level dielectric (ILD) laterally surrounding a memory device. One or more sidewall spacers are arranged along opposing sides of the memory device. The one or more sidewall spacers have a b...

Ausführliche Beschreibung

Bibliographische Detailangaben

Hauptverfasser:	Huang, Sheng-Huang, Min, Chung-Chiang, Chuang, Harry-Hak-Lay, Chen, Sheng-Chang, Wang, Hung Cho
Format:	Patent
Sprache:	eng
Schlagworte:	BASIC ELECTRIC ELEMENTS ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ELECTRICITY INFORMATION STORAGE PHYSICS SEMICONDUCTOR DEVICES STATIC STORES
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