POWER DISTRIBUTION STRUCTURE, MANUFACTURING METHOD, AND LAYOUT METHOD

An IC structure includes first and second complementary field-effect transistors (CFETs) positioned in a semiconductor wafer, each of the first and second CFETs including a gate structure extending in a first direction, an n-type channel extending through the gate structure in a second direction per...

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Bibliographische Detailangaben
Hauptverfasser: LIN, Wei-Cheng, WU, Guo-Huei, LU, Lee-Chung, HOU, Yung-Chin, TZENG, Wei-Cheng, TZENG, Jiann-Tyng, ZHUANG, Hui-Zhong, PENG, Shih-Wei
Format: Patent
Sprache:eng
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Zusammenfassung:An IC structure includes first and second complementary field-effect transistors (CFETs) positioned in a semiconductor wafer, each of the first and second CFETs including a gate structure extending in a first direction, an n-type channel extending through the gate structure in a second direction perpendicular to the first direction, and a p-type channel extending through the gate structure in the second direction and aligned with the n-type channel in a third direction perpendicular to each of the first and second directions. A metal line extends in the first direction, is aligned with each of the first and second CFETs in the third direction, and is configured to distribute a power supply or reference voltage to each of the first and second CFETs. The metal line is a metal line closest to each of the first and second CFETs along the third direction and extending in the first direction.