SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE
A semiconductor device includes a supporter including a plurality of stairs, a gate structure including gate lines that are stacked on the supporter, wherein the gate lines include pads, and the pads are disposed over the plurality of stairs, first contact plugs that are connected to the pads, and c...
Gespeichert in:
Hauptverfasser: | , , , , , |
---|---|
Format: | Patent |
Sprache: | eng |
Schlagworte: | |
Online-Zugang: | Volltext bestellen |
Tags: |
Tag hinzufügen
Keine Tags, Fügen Sie den ersten Tag hinzu!
|
container_end_page | |
---|---|
container_issue | |
container_start_page | |
container_title | |
container_volume | |
creator | CHOI, Won Geun JANG, Jung Shik KWAK, Rho Gyu CHOI, Jung Dal CHOI, Seok Min PARK, In Su |
description | A semiconductor device includes a supporter including a plurality of stairs, a gate structure including gate lines that are stacked on the supporter, wherein the gate lines include pads, and the pads are disposed over the plurality of stairs, first contact plugs that are connected to the pads, and channel structures that extend through the gate structure. |
format | Patent |
fullrecord | <record><control><sourceid>epo_EVB</sourceid><recordid>TN_cdi_epo_espacenet_US2024276718A1</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><sourcerecordid>US2024276718A1</sourcerecordid><originalsourceid>FETCH-epo_espacenet_US2024276718A13</originalsourceid><addsrcrecordid>eNrjZHANdvX1dPb3cwl1DvEPUnBxDfN0dlVw9HNR8HUN8fB3UfB3U_B19At1c3QOCQ3y9HNXwKaBh4E1LTGnOJUXSnMzKLu5hjh76KYW5MenFhckJqfmpZbEhwYbGRiZGJmbmRtaOBoaE6cKAEVeLSk</addsrcrecordid><sourcetype>Open Access Repository</sourcetype><iscdi>true</iscdi><recordtype>patent</recordtype></control><display><type>patent</type><title>SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE</title><source>esp@cenet</source><creator>CHOI, Won Geun ; JANG, Jung Shik ; KWAK, Rho Gyu ; CHOI, Jung Dal ; CHOI, Seok Min ; PARK, In Su</creator><creatorcontrib>CHOI, Won Geun ; JANG, Jung Shik ; KWAK, Rho Gyu ; CHOI, Jung Dal ; CHOI, Seok Min ; PARK, In Su</creatorcontrib><description>A semiconductor device includes a supporter including a plurality of stairs, a gate structure including gate lines that are stacked on the supporter, wherein the gate lines include pads, and the pads are disposed over the plurality of stairs, first contact plugs that are connected to the pads, and channel structures that extend through the gate structure.</description><language>eng</language><subject>ELECTRICITY</subject><creationdate>2024</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20240815&DB=EPODOC&CC=US&NR=2024276718A1$$EHTML$$P50$$Gepo$$Hfree_for_read</linktohtml><link.rule.ids>230,308,776,881,25542,76290</link.rule.ids><linktorsrc>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20240815&DB=EPODOC&CC=US&NR=2024276718A1$$EView_record_in_European_Patent_Office$$FView_record_in_$$GEuropean_Patent_Office$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>CHOI, Won Geun</creatorcontrib><creatorcontrib>JANG, Jung Shik</creatorcontrib><creatorcontrib>KWAK, Rho Gyu</creatorcontrib><creatorcontrib>CHOI, Jung Dal</creatorcontrib><creatorcontrib>CHOI, Seok Min</creatorcontrib><creatorcontrib>PARK, In Su</creatorcontrib><title>SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE</title><description>A semiconductor device includes a supporter including a plurality of stairs, a gate structure including gate lines that are stacked on the supporter, wherein the gate lines include pads, and the pads are disposed over the plurality of stairs, first contact plugs that are connected to the pads, and channel structures that extend through the gate structure.</description><subject>ELECTRICITY</subject><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>2024</creationdate><recordtype>patent</recordtype><sourceid>EVB</sourceid><recordid>eNrjZHANdvX1dPb3cwl1DvEPUnBxDfN0dlVw9HNR8HUN8fB3UfB3U_B19At1c3QOCQ3y9HNXwKaBh4E1LTGnOJUXSnMzKLu5hjh76KYW5MenFhckJqfmpZbEhwYbGRiZGJmbmRtaOBoaE6cKAEVeLSk</recordid><startdate>20240815</startdate><enddate>20240815</enddate><creator>CHOI, Won Geun</creator><creator>JANG, Jung Shik</creator><creator>KWAK, Rho Gyu</creator><creator>CHOI, Jung Dal</creator><creator>CHOI, Seok Min</creator><creator>PARK, In Su</creator><scope>EVB</scope></search><sort><creationdate>20240815</creationdate><title>SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE</title><author>CHOI, Won Geun ; JANG, Jung Shik ; KWAK, Rho Gyu ; CHOI, Jung Dal ; CHOI, Seok Min ; PARK, In Su</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-epo_espacenet_US2024276718A13</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>eng</language><creationdate>2024</creationdate><topic>ELECTRICITY</topic><toplevel>online_resources</toplevel><creatorcontrib>CHOI, Won Geun</creatorcontrib><creatorcontrib>JANG, Jung Shik</creatorcontrib><creatorcontrib>KWAK, Rho Gyu</creatorcontrib><creatorcontrib>CHOI, Jung Dal</creatorcontrib><creatorcontrib>CHOI, Seok Min</creatorcontrib><creatorcontrib>PARK, In Su</creatorcontrib><collection>esp@cenet</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>CHOI, Won Geun</au><au>JANG, Jung Shik</au><au>KWAK, Rho Gyu</au><au>CHOI, Jung Dal</au><au>CHOI, Seok Min</au><au>PARK, In Su</au><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE</title><date>2024-08-15</date><risdate>2024</risdate><abstract>A semiconductor device includes a supporter including a plurality of stairs, a gate structure including gate lines that are stacked on the supporter, wherein the gate lines include pads, and the pads are disposed over the plurality of stairs, first contact plugs that are connected to the pads, and channel structures that extend through the gate structure.</abstract><oa>free_for_read</oa></addata></record> |
fulltext | fulltext_linktorsrc |
identifier | |
ispartof | |
issn | |
language | eng |
recordid | cdi_epo_espacenet_US2024276718A1 |
source | esp@cenet |
subjects | ELECTRICITY |
title | SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE |
url | https://sfx.bib-bvb.de/sfx_tum?ctx_ver=Z39.88-2004&ctx_enc=info:ofi/enc:UTF-8&ctx_tim=2025-01-29T07%3A34%3A37IST&url_ver=Z39.88-2004&url_ctx_fmt=infofi/fmt:kev:mtx:ctx&rfr_id=info:sid/primo.exlibrisgroup.com:primo3-Article-epo_EVB&rft_val_fmt=info:ofi/fmt:kev:mtx:patent&rft.genre=patent&rft.au=CHOI,%20Won%20Geun&rft.date=2024-08-15&rft_id=info:doi/&rft_dat=%3Cepo_EVB%3EUS2024276718A1%3C/epo_EVB%3E%3Curl%3E%3C/url%3E&disable_directlink=true&sfx.directlink=off&sfx.report_link=0&rft_id=info:oai/&rft_id=info:pmid/&rfr_iscdi=true |