FACILITY LAYOUT DETERMINING METHOD AND FACILITY LAYOUT SYSTEM

FACILITY LAYOUT DETERMINING METHOD AND FACILITY LAYOUT SYSTEM

A method of determining a facility layout of a semiconductor factory including a main floor including processing zones, a clean sub-FAB (CSF) floor under the main floor, and a facility sub-FAB (FSF) floor under the CSF floor includes receiving data related to main facilities to be placed on the main...

Ausführliche Beschreibung

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Bibliographische Detailangaben
Hauptverfasser: Lee, Seungyong, Kwak, Jisan, Baek, Yonghwan, Song, Chulho, Jeong, Bora, Koh, Pilsung, BAE, Gyuduck, Hong, Boseok, Lee, Soyeon, Kim, Sangsu, Yeon, Kyuman, Park, Haegeun
Format: Patent
Sprache:eng
Schlagworte:
CALCULATING
COMPUTING
COUNTING
ELECTRIC DIGITAL DATA PROCESSING
PHYSICS
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Beschreibung
Zusammenfassung:A method of determining a facility layout of a semiconductor factory including a main floor including processing zones, a clean sub-FAB (CSF) floor under the main floor, and a facility sub-FAB (FSF) floor under the CSF floor includes receiving data related to main facilities to be placed on the main floor, CSF subsidiary facilities to be placed on the CSF floor, and FSF subsidiary facilities to be placed on the FSF floor, and determining the facility layout including a layout of the main facilities for the main floor, a layout of the CSF subsidiary facilities for the CSF floor, and a layout of the FSF subsidiary facilities for the FSF floor.