DYNAMIC WORD LINE ALLOCATION IN MEMORY SYSTEMS

Aspects of the present disclosure configure a memory sub-system controller to adaptively allocate word lines (WLs). The controller accesses reliability data of a set of main WLs of a block of the set of memory components. The controller determines that one or more WLs of the set of main WLs of the b...

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Bibliographische Detailangaben
Hauptverfasser: Yadav, Tarun Singh, Rori, Fulvio, Bates, Justin, Shukla, Pitamber, Stoller, Scott Anthony, Herrera, Attila A
Format: Patent
Sprache:eng
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Zusammenfassung:Aspects of the present disclosure configure a memory sub-system controller to adaptively allocate word lines (WLs). The controller accesses reliability data of a set of main WLs of a block of the set of memory components. The controller determines that one or more WLs of the set of main WLs of the block are associated with respective reliability data that transgress a threshold and, in response to determining that the one or more WLs are associated with the respective reliability data that transgress the threshold, replaces the one or more WLs of the set of main WLs of the block with one or more dummy WLs. The controller programs data into the block using the one or more dummy WLs instead of the one or more WLs of the set of main WLs of the block.