TRANSISTOR ASSEMBLIES WITH GATE CURRENT SHUNTING CAPABILITY, AND ASSOCIATED METHODS

A transistor assembly with gate current shunting capability includes first field effect transistor (FET), a first pull-up current source, a first pull-down current source, a first switching device, a control circuit, a capacitor, and a second FET. The first FET is an N-channel FET including a first gate, a first drain, and a first source. The first drain is electrically coupled to a first power supply. Each of the pull-up current source and the pull-down current source is electrically coupled to the first gate. The first switching device is electrically coupled in series with the first pull-down current source and is controlled by a first control signal. The control circuit is at least partially powered by a second power supply and generates the first control signal.The capacitor and the second FET collectively shunt current away from the first gate during a pre-power operating state of the transistor assembly.