SEMICONDUCTOR PACKAGE

A semiconductor package includes a lower package and an upper package on the lower package. The lower package includes a first substrate, chip stacks on the first substrate, a first mold structure on the first substrate that covers the chip stacks, and a second substrate on the first mold structure....

Ausführliche Beschreibung

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Bibliographische Detailangaben
Hauptverfasser: OH, SeungRyong, KIM, Dohyun, JO, Chajea
Format: Patent
Sprache:eng
Schlagworte:
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Beschreibung
Zusammenfassung:A semiconductor package includes a lower package and an upper package on the lower package. The lower package includes a first substrate, chip stacks on the first substrate, a first mold structure on the first substrate that covers the chip stacks, and a second substrate on the first mold structure. The chip stacks include a first semiconductor chip and a second semiconductor chip on the first semiconductor chip. The first semiconductor chip includes a first semiconductor substrate, a first wiring layer adjacent the first semiconductor substrate and including wiring patterns, a first circuit layer on the first semiconductor substrate and including a transistor and circuit wirings connected to the transistor, and a chip through electrode penetrating at least a portion of the first circuit layer and the first semiconductor substrate and a height of the chip through electrode ranges from 2 μm to 50 μm.