PACKAGE SUBSTRATE HAVING DEPRESSION

In examples, a packaged integrated circuit (IC) comprises a package substrate having opposite first and second surfaces and including metal interconnects surrounded by an insulation material. The package substrate includes a depression region that extends from the first surface, and the depression r...

Ausführliche Beschreibung

Gespeichert in:
Bibliographische Detailangaben
Hauptverfasser: LUEDERS, Michael, CALABRESE, Giacomo, NOQUIL, Jonathan Almeria
Format: Patent
Sprache:eng
Schlagworte:
Online-Zugang:Volltext bestellen
Tags: Tag hinzufügen
Keine Tags, Fügen Sie den ersten Tag hinzu!
Beschreibung
Zusammenfassung:In examples, a packaged integrated circuit (IC) comprises a package substrate having opposite first and second surfaces and including metal interconnects surrounded by an insulation material. The package substrate includes a depression region that extends from the first surface, and the depression region includes a material different from the insulation material and the metal interconnects. The packaged IC also comprises a semiconductor die on part of the first surface adjacent to the depression region. The semiconductor die includes circuitry coupled to the metal interconnects. The packaged IC also comprises a mold compound covering the semiconductor die and the depression region.