METHOD AND APPARATUS FOR ENTERING A STANDARD STATE FOR VANADIUM-BASED BATTERIES

At least some embodiments herein are related to a semiconductor chip assembly comprising: a memory containing information related to entering a standard state for a vanadium-based battery; and a processor, operatively connected with the memory, that provides instructions or commands related to enter...

Ausführliche Beschreibung

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Bibliographische Detailangaben
Hauptverfasser: Kim, Bu Gi, Lee, Dong Young
Format: Patent
Sprache:eng
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Beschreibung
Zusammenfassung:At least some embodiments herein are related to a semiconductor chip assembly comprising: a memory containing information related to entering a standard state for a vanadium-based battery; and a processor, operatively connected with the memory, that provides instructions or commands related to entering the standard state for the vanadium-based battery, by setting a constant temperature that is used in performing open circuit voltage (OCV) measurements, by setting one or more voltage values with respect to a particular voltage region that is used in performing the OCV measurements, and maintaining an equilibrium state of the vanadium-based battery while performing the OCV measurements. Also disclosed is a method comprising: entering a standard state for a vanadium-based battery and maintaining an equilibrium state of the vanadium-based battery while performing the OCV measurements. Additionally disclosed is a system comprising: at least one energy storage component having a plurality of vanadium-based batteries arranged in cells or packs; and a battery management component, operatively connected with the energy storage component, to provide battery management control for entering a standard state for the energy storage component.