LOAD STORE MICROARCHITECTURE CACHE ENHANCEMENTS

LOAD STORE MICROARCHITECTURE CACHE ENHANCEMENTS

One embodiment provides a graphics processor comprising memory access circuitry configured to generate a virtual address for pixel data at a pixel coordinate on a surface in memory to facilitate the caching of the pixel data in a cache memory before the actual memory address of the pixel coordinate...

Ausführliche Beschreibung

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Bibliographische Detailangaben
Hauptverfasser: Koker, Altug, Vaidyanathan, Karthik, Ray, Joydeep, Shinde, Prathamesh Raghunath, Ranganathan, Vasanth, Appu, Abhishek R, Liskay, Eric, Norris, Michael J, Chalasani, Sreedhar, Pantangi, Rajasekhar
Format: Patent
Sprache:eng
Schlagworte:
CALCULATING
COMPUTING
COUNTING
ELECTRIC DIGITAL DATA PROCESSING
PHYSICS
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Beschreibung
Zusammenfassung:One embodiment provides a graphics processor comprising memory access circuitry configured to generate a virtual address for pixel data at a pixel coordinate on a surface in memory to facilitate the caching of the pixel data in a cache memory before the actual memory address of the pixel coordinate is able to be determined.