Low-Speed Ring with Controlled Jitter

Example embodiments relate to communication links, computing systems, and methods for their use. An example embodiment includes a communication link. The communication link includes a low-voltage differential signaling (LVDS) driver. The LVDS driver is configured to provide a differential signal that is based on a digital bit stream. The digital bit stream includes a series of digital bits that are temporally arranged based on a nominal bit period. The communication link also includes a controllable delay device. The controllable delay device is configured to provide a delay signal to the LVDS driver so as to cause a rising edge or a falling edge of respective digital bits to vary in time with respect to the nominal bit period based on a predetermined sequence of delay amounts. The delay amounts represent positive and negative differences in time from the nominal bit period.