SEMICONDUCTOR PACKAGE

Provided is a semiconductor chip stack structure including a plurality of first semiconductor chip dies stacked in a vertical direction, and one or more second semiconductor chip dies between adjacent first semiconductor chip dies among the plurality of first semiconductor chip dies, wherein a thick...

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Bibliographische Detailangaben
Hauptverfasser:	Lee, Soohwan, Lee, Chungsun, Jee, Young Kun, PARK, Sang Cheon
Format:	Patent
Sprache:	eng
Schlagworte:	BASIC ELECTRIC ELEMENTS ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ELECTRICITY SEMICONDUCTOR DEVICES
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Beschreibung
Zusammenfassung:	Provided is a semiconductor chip stack structure including a plurality of first semiconductor chip dies stacked in a vertical direction, and one or more second semiconductor chip dies between adjacent first semiconductor chip dies among the plurality of first semiconductor chip dies, wherein a thickness of each second semiconductor chip die of the one or more second semiconductor chip dies is greater than a thickness of each first semiconductor chip die of the plurality of first semiconductor chip dies in the vertical direction.