THREE-DIMENSIONAL MEMORY DEVICE AND FABRICATION METHOD FOR IMPROVED YIELD AND RELIABILITY
A 3D memory device includes a conductor/insulator stack containing a conductive layer and a dielectric layer alternatingly stacked, channel hole structures in a first region of memory cells in the conductor/insulator stack, a blocking structure adjacent to the first region, and a dummy channel hole...
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Format: | Patent |
Sprache: | eng |
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Zusammenfassung: | A 3D memory device includes a conductor/insulator stack containing a conductive layer and a dielectric layer alternatingly stacked, channel hole structures in a first region of memory cells in the conductor/insulator stack, a blocking structure adjacent to the first region, and a dummy channel hole structure in the first region. The dummy channel hole structure is adjacent to the blocking structure, and includes a dielectric material that fills a channel hole to form a first dielectric filling structure. |
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