SEMICONDUCTOR PACKAGE

Disclosed is a semiconductor package comprising a lower circuit part having a first region and a second region horizontally offset from each other and including a connection structure within the first region and a logic chip within the second region, a memory structure that overlaps the connection s...

Ausführliche Beschreibung

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Bibliographische Detailangaben
Hauptverfasser: MUN, KYUNG DON, HWANG, HYEONJEONG, KIM, DONGKYU, SUK, KYOUNG LIM
Format: Patent
Sprache:eng
Schlagworte:
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Beschreibung
Zusammenfassung:Disclosed is a semiconductor package comprising a lower circuit part having a first region and a second region horizontally offset from each other and including a connection structure within the first region and a logic chip within the second region, a memory structure that overlaps the connection structure in a vertical direction, and a thermal radiation structure that overlaps the logic chip in the vertical direction. The logic chip and the memory structure are spaced apart in a horizontal direction parallel to a top surface of the logic chip.