APPARATUS AND METHOD WITH IN-MEMORY COMPUTING (IMC) PROCESSOR

An apparatus includes a static random access memory (SRAM) cell including a first inverter and a second inverter, and a third inverter including a first inverter transistor and a second inverter transistor. An output terminal of the first inverter is connected to a source terminal of the second inve...

Ausführliche Beschreibung

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Bibliographische Detailangaben
Hauptverfasser: YUN, Seok Ju, KWON, Soon-Wan, JUNG, Seungchul
Format: Patent
Sprache:eng
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Beschreibung
Zusammenfassung:An apparatus includes a static random access memory (SRAM) cell including a first inverter and a second inverter, and a third inverter including a first inverter transistor and a second inverter transistor. An output terminal of the first inverter is connected to a source terminal of the second inverter transistor.