FREQUENCY MULTIPLIER CIRCUIT WITH PROGRAMMABLE FREQUENCY TRANSITION CONTROLLER

A frequency multiplier circuit includes a first multiplier circuit to generate a first digital value representing a received reference signal having a reference frequency and reference phase, the multiplier circuit to multiply the first digital value by a multiplier value. Comparison circuitry compares the first digital value to an output digital value representing an output signal having an output frequency and an output phase, the comparison circuitry to generate an error signal based on the comparison. A programmable loop filter generates a control signal based at least in part on the error signal. A frequency generation circuit produces the output signal having the output frequency and phase. A phase-to-digital converter generates and feeds the output digital value to the phase comparison circuitry. A programmable transition controller controls a transitioning frequency relationship between a first signal frequency of a first locked output signal and a desired second signal frequency.