SEMICONDUCTOR STRUCTURE HAVING DEEP TRENCH CAPACITOR AND METHOD OF MANUFACTURING THEREOF
A semiconductor structure includes a substrate including a recess indented into the substrate, a capacitor structure at least partially disposed within the recess, and an interconnect structure disposed over and electrically connected to the capacitor structure. The capacitor structure includes a fi...
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creator | TAI, CHIH-HSUAN LU, HSIANG-TAI |
description | A semiconductor structure includes a substrate including a recess indented into the substrate, a capacitor structure at least partially disposed within the recess, and an interconnect structure disposed over and electrically connected to the capacitor structure. The capacitor structure includes a first electrode layer, a second electrode layer over the first electrode layer, and a first dielectric between the first electrode layer and the second electrode layer. The first electrode layer includes a first body portion disposed in and conformal to the recess and a first extending portion disposed on the substrate, and the second electrode layer covers the first dielectric, the first body portion and the first extending portion of the first electrode layer. |
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fullrecord | <record><control><sourceid>epo_EVB</sourceid><recordid>TN_cdi_epo_espacenet_US2024170584A1</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><sourcerecordid>US2024170584A1</sourcerecordid><originalsourceid>FETCH-epo_espacenet_US2024170584A13</originalsourceid><addsrcrecordid>eNqNi7EKwjAUALM4iPoPD5yFtlZ0fSQvJkOSkr6IWykSJ9FC_X804Ac43Q13S3HtyVkZvEqSQ4Se41dSJDB4sf4MiqgDjuSlAYkdSlsy9AocsQkKggaHPmksWznYUKSg12JxHx9z3vy4EltNLM0uT68hz9N4y8_8HlLfVE1bH6vDqcV6_1_1Ad1PMmQ</addsrcrecordid><sourcetype>Open Access Repository</sourcetype><iscdi>true</iscdi><recordtype>patent</recordtype></control><display><type>patent</type><title>SEMICONDUCTOR STRUCTURE HAVING DEEP TRENCH CAPACITOR AND METHOD OF MANUFACTURING THEREOF</title><source>esp@cenet</source><creator>TAI, CHIH-HSUAN ; LU, HSIANG-TAI</creator><creatorcontrib>TAI, CHIH-HSUAN ; LU, HSIANG-TAI</creatorcontrib><description>A semiconductor structure includes a substrate including a recess indented into the substrate, a capacitor structure at least partially disposed within the recess, and an interconnect structure disposed over and electrically connected to the capacitor structure. The capacitor structure includes a first electrode layer, a second electrode layer over the first electrode layer, and a first dielectric between the first electrode layer and the second electrode layer. The first electrode layer includes a first body portion disposed in and conformal to the recess and a first extending portion disposed on the substrate, and the second electrode layer covers the first dielectric, the first body portion and the first extending portion of the first electrode layer.</description><language>eng</language><subject>BASIC ELECTRIC ELEMENTS ; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ; ELECTRICITY ; SEMICONDUCTOR DEVICES</subject><creationdate>2024</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20240523&DB=EPODOC&CC=US&NR=2024170584A1$$EHTML$$P50$$Gepo$$Hfree_for_read</linktohtml><link.rule.ids>230,308,780,885,25564,76547</link.rule.ids><linktorsrc>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20240523&DB=EPODOC&CC=US&NR=2024170584A1$$EView_record_in_European_Patent_Office$$FView_record_in_$$GEuropean_Patent_Office$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>TAI, CHIH-HSUAN</creatorcontrib><creatorcontrib>LU, HSIANG-TAI</creatorcontrib><title>SEMICONDUCTOR STRUCTURE HAVING DEEP TRENCH CAPACITOR AND METHOD OF MANUFACTURING THEREOF</title><description>A semiconductor structure includes a substrate including a recess indented into the substrate, a capacitor structure at least partially disposed within the recess, and an interconnect structure disposed over and electrically connected to the capacitor structure. The capacitor structure includes a first electrode layer, a second electrode layer over the first electrode layer, and a first dielectric between the first electrode layer and the second electrode layer. The first electrode layer includes a first body portion disposed in and conformal to the recess and a first extending portion disposed on the substrate, and the second electrode layer covers the first dielectric, the first body portion and the first extending portion of the first electrode layer.</description><subject>BASIC ELECTRIC ELEMENTS</subject><subject>ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR</subject><subject>ELECTRICITY</subject><subject>SEMICONDUCTOR DEVICES</subject><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>2024</creationdate><recordtype>patent</recordtype><sourceid>EVB</sourceid><recordid>eNqNi7EKwjAUALM4iPoPD5yFtlZ0fSQvJkOSkr6IWykSJ9FC_X804Ac43Q13S3HtyVkZvEqSQ4Se41dSJDB4sf4MiqgDjuSlAYkdSlsy9AocsQkKggaHPmksWznYUKSg12JxHx9z3vy4EltNLM0uT68hz9N4y8_8HlLfVE1bH6vDqcV6_1_1Ad1PMmQ</recordid><startdate>20240523</startdate><enddate>20240523</enddate><creator>TAI, CHIH-HSUAN</creator><creator>LU, HSIANG-TAI</creator><scope>EVB</scope></search><sort><creationdate>20240523</creationdate><title>SEMICONDUCTOR STRUCTURE HAVING DEEP TRENCH CAPACITOR AND METHOD OF MANUFACTURING THEREOF</title><author>TAI, CHIH-HSUAN ; LU, HSIANG-TAI</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-epo_espacenet_US2024170584A13</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>eng</language><creationdate>2024</creationdate><topic>BASIC ELECTRIC ELEMENTS</topic><topic>ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR</topic><topic>ELECTRICITY</topic><topic>SEMICONDUCTOR DEVICES</topic><toplevel>online_resources</toplevel><creatorcontrib>TAI, CHIH-HSUAN</creatorcontrib><creatorcontrib>LU, HSIANG-TAI</creatorcontrib><collection>esp@cenet</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>TAI, CHIH-HSUAN</au><au>LU, HSIANG-TAI</au><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>SEMICONDUCTOR STRUCTURE HAVING DEEP TRENCH CAPACITOR AND METHOD OF MANUFACTURING THEREOF</title><date>2024-05-23</date><risdate>2024</risdate><abstract>A semiconductor structure includes a substrate including a recess indented into the substrate, a capacitor structure at least partially disposed within the recess, and an interconnect structure disposed over and electrically connected to the capacitor structure. The capacitor structure includes a first electrode layer, a second electrode layer over the first electrode layer, and a first dielectric between the first electrode layer and the second electrode layer. The first electrode layer includes a first body portion disposed in and conformal to the recess and a first extending portion disposed on the substrate, and the second electrode layer covers the first dielectric, the first body portion and the first extending portion of the first electrode layer.</abstract><oa>free_for_read</oa></addata></record> |
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subjects | BASIC ELECTRIC ELEMENTS ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ELECTRICITY SEMICONDUCTOR DEVICES |
title | SEMICONDUCTOR STRUCTURE HAVING DEEP TRENCH CAPACITOR AND METHOD OF MANUFACTURING THEREOF |
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