SUBSTRATE AND MANUFACTURING METHOD FOR THE SAME

A substrate including: an insulation layer; a conductive layer disposed on the insulation layer; and a via hole configured to include a lower hole disposed in a first portion of the insulation layer and an upper hole disposed in a second portion of the insulating layer and connected to the lower hol...

Ausführliche Beschreibung

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Bibliographische Detailangaben
Hauptverfasser:	Lee, Chulmin, Kim, Sanghoon, Ko, Young Kuk, Oh, Inhwan, Ko, Chanhoon, Bae, Sohyun, Lim, Kyounghee
Format:	Patent
Sprache:	eng
Schlagworte:	BASIC ELECTRIC ELEMENTS ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ELECTRICITY SEMICONDUCTOR DEVICES
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Beschreibung
Zusammenfassung:	A substrate including: an insulation layer; a conductive layer disposed on the insulation layer; and a via hole configured to include a lower hole disposed in a first portion of the insulation layer and an upper hole disposed in a second portion of the insulating layer and connected to the lower hole, wherein a width of the upper hole is greater than that of the lower hole, at least a portion of the upper hole of the insulation layer has a width that is substantially equal to that of the upper hole of the conductive layer, and a first angle formed between a first direction that is parallel to a lower surface of the insulating layer and a sidewall of the lower hole and a second angle formed between the first direction and a sidewall of the upper hole are different from each other.