REDUCED GATE TOP CD WITH WRAP-AROUND GATE CONTACT

A semiconductor structure is presented including a plurality of field effect transistor (FET) devices, each FET device having a different gate threshold voltage, first spacers disposed on sidewalls of each FET device, second spacers disposed over and in direct contact with the first spacers, the second spacers having a width greater than a width of the first spacers, and a gate contact directly contacting an FET device of the plurality of FET devices, where only an upper portion of the gate contact directly contacts third spacers on opposed ends thereof. The second spacers can have a bi-layer configuration and the gate contact wraps around a top portion of the FET device in direct contact with the gate contact.