SEMICONDUCTOR PACKAGE

Provided is a semiconductor package including a lower redistribution structure, an internal semiconductor chip on an upper surface of the lower redistribution structure, an upper redistribution structure electrically connected to the lower redistribution structure through a conductive post, and a molding layer between the upper redistribution structure and the lower redistribution structure, the molding layer being adjacent to the internal semiconductor chip, wherein the upper redistribution structure includes an insulating layer including a redistribution pattern and a first material configured to transmit light, and a fiducial mark formed of the first material, and a lower surface of the fiducial mark is in contact with an upper surface of the molding layer.