WIDE BANDGAP TRANSISTOR LAYOUT WITH STAGGERED GATE ELECTRODE FINGERS

WIDE BANDGAP TRANSISTOR LAYOUT WITH STAGGERED GATE ELECTRODE FINGERS

A transistor comprising a first drain region, a first source region disposed on a first side of the first drain region, a first active region defined between the first drain region and the first source region, a second source region disposed on a second side of the first drain region opposite the fi...

Ausführliche Beschreibung

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Bibliographische Detailangaben
1. Verfasser: Blin, Guillaume Alexandre
Format: Patent
Sprache:eng
Schlagworte:
BASIC ELECTRIC ELEMENTS
ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
ELECTRICITY
SEMICONDUCTOR DEVICES
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Beschreibung
Zusammenfassung:A transistor comprising a first drain region, a first source region disposed on a first side of the first drain region, a first active region defined between the first drain region and the first source region, a second source region disposed on a second side of the first drain region opposite the first side and displaced in a widthwise direction from the first source region, a second active region defined between the first drain region and the second source region, a first gate electrode finger disposed over the first active region, and a second gate electrode finger disposed over the second active region.