PLUG BETWEEN TWO GATES OF A SEMICONDUCTOR DEVICE

Embodiments described herein may be related to apparatuses, processes, systems, and/or techniques for forming a plug between two gates within a transistor layer of a semiconductor device. In embodiments, the plug includes a cap at a top of the plug and a liner surrounding at least a portion of the c...

Ausführliche Beschreibung

Gespeichert in:
Bibliographische Detailangaben
Hauptverfasser: JOACHIM, Robert, SUN, Hongqian, LIU, Shengsi, GULER, Leonard P, GHANI, Tahir
Format: Patent
Sprache:eng
Schlagworte:
Online-Zugang:Volltext bestellen
Tags: Tag hinzufügen
Keine Tags, Fügen Sie den ersten Tag hinzu!
Beschreibung
Zusammenfassung:Embodiments described herein may be related to apparatuses, processes, systems, and/or techniques for forming a plug between two gates within a transistor layer of a semiconductor device. In embodiments, the plug includes a cap at a top of the plug and a liner surrounding at least a portion of the cap, and a base below the cap and the liner. The cap may include a metal. A top of the cap may be even with, or substantially even with, the top of the two gates. The plug may provide a more even surface at a top of a transistor layer where the plug fills in for a gate cut. Other embodiments may be described and/or claimed.