Techniques for Monitoring Digital Timing Margins

Various implementations described herein are directed to a device having core circuitry and hardware with functional paths and canary paths that are co-located with the functional paths. The device may have timing monitors that monitor and measure digital timing margins of the functional paths and t...

Ausführliche Beschreibung

Bibliographische Detailangaben

Hauptverfasser:	Das, Shidhartha, Herberholz, Rainer
Format:	Patent
Sprache:	eng
Schlagworte:	CALCULATING COMPUTING COUNTING ELECTRIC DIGITAL DATA PROCESSING PHYSICS
Online-Zugang:	Volltext bestellen
Tags:	Tag hinzufügen Keine Tags, Fügen Sie den ersten Tag hinzu!