SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF

Disclosed is a semiconductor fabrication method. The method includes forming a gate stack in an area previously occupied by a dummy gate structure; forming a first metal cap layer over the gate stack; forming a first dielectric cap layer over the first metal cap layer; selectively removing a portion...

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Bibliographische Detailangaben
Hauptverfasser: Pan, Tzu-Wen, Lin, Yih-Ann, Wang, Yu-Shih, Yang, Jih-Sheng, Lin, Yu-Hsien, Chen, Ryan Chia-Jen, Yin, Li-Wei, Chao, Shih-Chieh
Format: Patent
Sprache:eng
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Beschreibung
Zusammenfassung:Disclosed is a semiconductor fabrication method. The method includes forming a gate stack in an area previously occupied by a dummy gate structure; forming a first metal cap layer over the gate stack; forming a first dielectric cap layer over the first metal cap layer; selectively removing a portion of the gate stack and the first metal cap layer while leaving a sidewall portion of the first metal cap layer that extends along a sidewall of the first dielectric cap layer; forming a second metal cap layer over the gate stack and the first metal cap layer wherein a sidewall portion of the second metal cap layer extends further along a sidewall of the first dielectric cap layer; forming a second dielectric cap layer over the second metal cap layer; and flattening a top layer of the first dielectric cap layer and the second dielectric cap layer using planarization operations.