MEMORY CONTROLLER, MEMORY CONTROLLER CONTROL METHOD, AND MEMORY SYSTEM

MEMORY CONTROLLER, MEMORY CONTROLLER CONTROL METHOD, AND MEMORY SYSTEM

According to one embodiment, a memory controller includes a compression unit that compresses two or more determination voltage values for threshold voltages of a memory cell to a vector quantity, the memory cell being capable of storing three or more data values. The memory controller further includ...

Ausführliche Beschreibung

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Bibliographische Detailangaben
Hauptverfasser: KOMATSU, Yuki, SHIMADA, Katsuyuki
Format: Patent
Sprache:eng
Schlagworte:
CALCULATING
COMPUTER SYSTEMS BASED ON SPECIFIC COMPUTATIONAL MODELS
COMPUTING
COUNTING
ELECTRIC DIGITAL DATA PROCESSING
INFORMATION STORAGE
PHYSICS
STATIC STORES
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Beschreibung
Zusammenfassung:According to one embodiment, a memory controller includes a compression unit that compresses two or more determination voltage values for threshold voltages of a memory cell to a vector quantity, the memory cell being capable of storing three or more data values. The memory controller further includes a storing unit that stores the vector quantity into a memory region. The memory controller further includes a decompression unit that decompresses the stored vector quantity to provide the determination voltage values.