Pillar Based Memory (MRAM) Embedded within the Buried Power Rail within a Backside Power Distribution Network

An apparatus comprising a backside power distribution network; a backside power rail joined to the backside power distribution network; and a backside contact via that couples at least one front end of line transistor to the backside power rail; wherein the backside contact via comprises a pillar ba...

Ausführliche Beschreibung

Gespeichert in:
Bibliographische Detailangaben
Hauptverfasser: Tsai, Wu-Chang, Rizzolo, Michael, Reznicek, Alexander, Zhao, Ailian
Format: Patent
Sprache:eng
Online-Zugang:Volltext bestellen
Tags: Tag hinzufügen
Keine Tags, Fügen Sie den ersten Tag hinzu!
container_end_page
container_issue
container_start_page
container_title
container_volume
creator Tsai, Wu-Chang
Rizzolo, Michael
Reznicek, Alexander
Zhao, Ailian
description An apparatus comprising a backside power distribution network; a backside power rail joined to the backside power distribution network; and a backside contact via that couples at least one front end of line transistor to the backside power rail; wherein the backside contact via comprises a pillar based memory device.
format Patent
fullrecord <record><control><sourceid>epo_EVB</sourceid><recordid>TN_cdi_epo_espacenet_US2024090235A1</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><sourcerecordid>US2024090235A1</sourcerecordid><originalsourceid>FETCH-epo_espacenet_US2024090235A13</originalsourceid><addsrcrecordid>eNqNjLEOgjAURVkcjPoPL3HRwQRBB0dQjEsNQZ1Joc_wQktJW9L49zLg7nSTc07uPFA5SckNpNyiAIZKmw9sWJGwLWSqQiFG7Mk11IFrENLB0Ehy7dFAwUn-JB8v6taSwEleyDpD1eBId3BH57Vpl8HszaXF1bSLYH3NnufbDntdou15jR268vWIwugQnsIoPib7-L_qCyHyQSc</addsrcrecordid><sourcetype>Open Access Repository</sourcetype><iscdi>true</iscdi><recordtype>patent</recordtype></control><display><type>patent</type><title>Pillar Based Memory (MRAM) Embedded within the Buried Power Rail within a Backside Power Distribution Network</title><source>esp@cenet</source><creator>Tsai, Wu-Chang ; Rizzolo, Michael ; Reznicek, Alexander ; Zhao, Ailian</creator><creatorcontrib>Tsai, Wu-Chang ; Rizzolo, Michael ; Reznicek, Alexander ; Zhao, Ailian</creatorcontrib><description>An apparatus comprising a backside power distribution network; a backside power rail joined to the backside power distribution network; and a backside contact via that couples at least one front end of line transistor to the backside power rail; wherein the backside contact via comprises a pillar based memory device.</description><language>eng</language><creationdate>2024</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&amp;date=20240314&amp;DB=EPODOC&amp;CC=US&amp;NR=2024090235A1$$EHTML$$P50$$Gepo$$Hfree_for_read</linktohtml><link.rule.ids>230,308,780,885,25555,76308</link.rule.ids><linktorsrc>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&amp;date=20240314&amp;DB=EPODOC&amp;CC=US&amp;NR=2024090235A1$$EView_record_in_European_Patent_Office$$FView_record_in_$$GEuropean_Patent_Office$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>Tsai, Wu-Chang</creatorcontrib><creatorcontrib>Rizzolo, Michael</creatorcontrib><creatorcontrib>Reznicek, Alexander</creatorcontrib><creatorcontrib>Zhao, Ailian</creatorcontrib><title>Pillar Based Memory (MRAM) Embedded within the Buried Power Rail within a Backside Power Distribution Network</title><description>An apparatus comprising a backside power distribution network; a backside power rail joined to the backside power distribution network; and a backside contact via that couples at least one front end of line transistor to the backside power rail; wherein the backside contact via comprises a pillar based memory device.</description><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>2024</creationdate><recordtype>patent</recordtype><sourceid>EVB</sourceid><recordid>eNqNjLEOgjAURVkcjPoPL3HRwQRBB0dQjEsNQZ1Joc_wQktJW9L49zLg7nSTc07uPFA5SckNpNyiAIZKmw9sWJGwLWSqQiFG7Mk11IFrENLB0Ehy7dFAwUn-JB8v6taSwEleyDpD1eBId3BH57Vpl8HszaXF1bSLYH3NnufbDntdou15jR268vWIwugQnsIoPib7-L_qCyHyQSc</recordid><startdate>20240314</startdate><enddate>20240314</enddate><creator>Tsai, Wu-Chang</creator><creator>Rizzolo, Michael</creator><creator>Reznicek, Alexander</creator><creator>Zhao, Ailian</creator><scope>EVB</scope></search><sort><creationdate>20240314</creationdate><title>Pillar Based Memory (MRAM) Embedded within the Buried Power Rail within a Backside Power Distribution Network</title><author>Tsai, Wu-Chang ; Rizzolo, Michael ; Reznicek, Alexander ; Zhao, Ailian</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-epo_espacenet_US2024090235A13</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>eng</language><creationdate>2024</creationdate><toplevel>online_resources</toplevel><creatorcontrib>Tsai, Wu-Chang</creatorcontrib><creatorcontrib>Rizzolo, Michael</creatorcontrib><creatorcontrib>Reznicek, Alexander</creatorcontrib><creatorcontrib>Zhao, Ailian</creatorcontrib><collection>esp@cenet</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>Tsai, Wu-Chang</au><au>Rizzolo, Michael</au><au>Reznicek, Alexander</au><au>Zhao, Ailian</au><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>Pillar Based Memory (MRAM) Embedded within the Buried Power Rail within a Backside Power Distribution Network</title><date>2024-03-14</date><risdate>2024</risdate><abstract>An apparatus comprising a backside power distribution network; a backside power rail joined to the backside power distribution network; and a backside contact via that couples at least one front end of line transistor to the backside power rail; wherein the backside contact via comprises a pillar based memory device.</abstract><oa>free_for_read</oa></addata></record>
fulltext fulltext_linktorsrc
identifier
ispartof
issn
language eng
recordid cdi_epo_espacenet_US2024090235A1
source esp@cenet
title Pillar Based Memory (MRAM) Embedded within the Buried Power Rail within a Backside Power Distribution Network
url https://sfx.bib-bvb.de/sfx_tum?ctx_ver=Z39.88-2004&ctx_enc=info:ofi/enc:UTF-8&ctx_tim=2025-01-14T19%3A14%3A32IST&url_ver=Z39.88-2004&url_ctx_fmt=infofi/fmt:kev:mtx:ctx&rfr_id=info:sid/primo.exlibrisgroup.com:primo3-Article-epo_EVB&rft_val_fmt=info:ofi/fmt:kev:mtx:patent&rft.genre=patent&rft.au=Tsai,%20Wu-Chang&rft.date=2024-03-14&rft_id=info:doi/&rft_dat=%3Cepo_EVB%3EUS2024090235A1%3C/epo_EVB%3E%3Curl%3E%3C/url%3E&disable_directlink=true&sfx.directlink=off&sfx.report_link=0&rft_id=info:oai/&rft_id=info:pmid/&rfr_iscdi=true