SEMICONDUCTOR PACKAGE AND METHOD OF MANUFACTURING THE SEMICONDUCTOR PACKAGE
A semiconductor package includes a first redistribution wiring layer including a first redistribution wiring, a semiconductor chip disposed on the first redistribution wiring layer, a plurality of interposer connectors disposed on the first redistribution wiring layer, each of the plurality of inter...
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Format: | Patent |
Sprache: | eng |
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Zusammenfassung: | A semiconductor package includes a first redistribution wiring layer including a first redistribution wiring, a semiconductor chip disposed on the first redistribution wiring layer, a plurality of interposer connectors disposed on the first redistribution wiring layer, each of the plurality of interposer connectors including a first surface facing the first redistribution wiring layer and a second surface opposite the first surface, a plurality of through electrodes and a plurality of core balls formed on the first surface and including a core and a solder layer, the through electrodes being electrically connected to the first redistribution wiring by the core balls, a molding member on the first redistribution wiring layer that covers the semiconductor chip, and a second redistribution wiring layer disposed on the molding member including a second redistribution wiring electrically connected to the through electrodes. |
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