BURIED METAL SIGNAL RAIL FOR MEMORY ARRAYS

An IC memory device includes a substrate and an array of memory cells on the substrate. Each memory cell includes at least one memory cell transistor in a layer of the device adjacent to the substrate. In the same layer, the device also includes a plurality of shunt transistors. The device also incl...

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Bibliographische Detailangaben
Hauptverfasser: Clevenger, Lawrence A, Senapati, Biswanath, MUNETOH, SEIJI, Lanzillo, Nicholas Anthony, Burr, Geoffrey, Hosokawa, Kohji
Format: Patent
Sprache:eng
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Beschreibung
Zusammenfassung:An IC memory device includes a substrate and an array of memory cells on the substrate. Each memory cell includes at least one memory cell transistor in a layer of the device adjacent to the substrate. In the same layer, the device also includes a plurality of shunt transistors. The device also includes a buried metal signal rail, which is disposed between the array of memory cells and the plurality of shunt transistors in a buried layer that is embedded into the substrate below the transistors. The device also includes single-layer vias, which are in same layer as the transistors and electrically connect the memory cell transistors to the shunt transistors through the buried metal signal rail.