OPERATION METHOD OF MEMORY DEVICE

Disclosed is an operation method of a memory device which includes a plurality of memory cells stacked in a direction perpendicular to a substrate and a plurality of word lines respectively connected with the plurality of memory cells. The method includes applying a 0-th pass voltage to a first selected word line among the plurality of word lines and applying a first pass voltage to a first upper adjacent word line among the plurality of word lines, during a first word line setup period, and applying a first program voltage to the first selected word line and applying a second pass voltage smaller than the first pass voltage to the first upper adjacent word line, during a first program execution period after the first word line setup period. The first upper adjacent word line is a word line physically adjacent to the first selected word line.