SEMICONDUCTOR PACKAGE AND METHOD OF MANUFACTURING THE SEMICONDUCTOR PACKAGE
A semiconductor package includes a redistribution wiring layer having redistribution wirings stacked in at least two levels; a first semiconductor chip arranged on the redistribution wiring layer; a plurality of second semiconductor chips arranged on the first semiconductor chip; first conductive wi...
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| creator | SEO, Wonil |
| description | A semiconductor package includes a redistribution wiring layer having redistribution wirings stacked in at least two levels; a first semiconductor chip arranged on the redistribution wiring layer; a plurality of second semiconductor chips arranged on the first semiconductor chip; first conductive wires electrically connecting first chip pads of the first semiconductor chip and the redistribution wirings of the redistribution wiring layer; second conductive wires electrically connecting second chip pads of the plurality of second semiconductor chips and the redistribution wirings of the redistribution wiring layer; and a sealing unit disposed on the redistribution wiring layer. |
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a plurality of second semiconductor chips arranged on the first semiconductor chip; first conductive wires electrically connecting first chip pads of the first semiconductor chip and the redistribution wirings of the redistribution wiring layer; second conductive wires electrically connecting second chip pads of the plurality of second semiconductor chips and the redistribution wirings of the redistribution wiring layer; and a sealing unit disposed on the redistribution wiring layer.</description><language>eng</language><subject>BASIC ELECTRIC ELEMENTS ; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ; ELECTRICITY ; SEMICONDUCTOR DEVICES</subject><creationdate>2024</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20240229&DB=EPODOC&CC=US&NR=2024071996A1$$EHTML$$P50$$Gepo$$Hfree_for_read</linktohtml><link.rule.ids>230,308,776,881,25542,76516</link.rule.ids><linktorsrc>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20240229&DB=EPODOC&CC=US&NR=2024071996A1$$EView_record_in_European_Patent_Office$$FView_record_in_$$GEuropean_Patent_Office$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>SEO, Wonil</creatorcontrib><title>SEMICONDUCTOR PACKAGE AND METHOD OF MANUFACTURING THE SEMICONDUCTOR PACKAGE</title><description>A semiconductor package includes a redistribution wiring layer having redistribution wirings stacked in at least two levels; a first semiconductor chip arranged on the redistribution wiring layer; a plurality of second semiconductor chips arranged on the first semiconductor chip; first conductive wires electrically connecting first chip pads of the first semiconductor chip and the redistribution wirings of the redistribution wiring layer; second conductive wires electrically connecting second chip pads of the plurality of second semiconductor chips and the redistribution wirings of the redistribution wiring layer; and a sealing unit disposed on the redistribution wiring layer.</description><subject>BASIC ELECTRIC ELEMENTS</subject><subject>ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR</subject><subject>ELECTRICITY</subject><subject>SEMICONDUCTOR DEVICES</subject><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>2024</creationdate><recordtype>patent</recordtype><sourceid>EVB</sourceid><recordid>eNrjZPAOdvX1dPb3cwl1DvEPUghwdPZ2dHdVcPRzUfB1DfHwd1Hwd1PwdfQLdXN0DgkN8vRzVwjxcFXAqouHgTUtMac4lRdKczMou7mGOHvophbkx6cWFyQmp-allsSHBhsZGJkYmBtaWpo5GhoTpwoARYAuqg</recordid><startdate>20240229</startdate><enddate>20240229</enddate><creator>SEO, Wonil</creator><scope>EVB</scope></search><sort><creationdate>20240229</creationdate><title>SEMICONDUCTOR PACKAGE AND METHOD OF MANUFACTURING THE SEMICONDUCTOR PACKAGE</title><author>SEO, Wonil</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-epo_espacenet_US2024071996A13</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>eng</language><creationdate>2024</creationdate><topic>BASIC ELECTRIC ELEMENTS</topic><topic>ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR</topic><topic>ELECTRICITY</topic><topic>SEMICONDUCTOR DEVICES</topic><toplevel>online_resources</toplevel><creatorcontrib>SEO, Wonil</creatorcontrib><collection>esp@cenet</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>SEO, Wonil</au><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>SEMICONDUCTOR PACKAGE AND METHOD OF MANUFACTURING THE SEMICONDUCTOR PACKAGE</title><date>2024-02-29</date><risdate>2024</risdate><abstract>A semiconductor package includes a redistribution wiring layer having redistribution wirings stacked in at least two levels; a first semiconductor chip arranged on the redistribution wiring layer; a plurality of second semiconductor chips arranged on the first semiconductor chip; first conductive wires electrically connecting first chip pads of the first semiconductor chip and the redistribution wirings of the redistribution wiring layer; second conductive wires electrically connecting second chip pads of the plurality of second semiconductor chips and the redistribution wirings of the redistribution wiring layer; and a sealing unit disposed on the redistribution wiring layer.</abstract><oa>free_for_read</oa></addata></record> |
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| language | eng |
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| subjects | BASIC ELECTRIC ELEMENTS ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ELECTRICITY SEMICONDUCTOR DEVICES |
| title | SEMICONDUCTOR PACKAGE AND METHOD OF MANUFACTURING THE SEMICONDUCTOR PACKAGE |
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