WAFER SIGNAL AND POWER ARRANGEMENT FOR NANOSHEET DEVICES

A semiconductor device includes an integrated circuit chip having a frontside and a backside. The frontside includes a frontside signal line configured to transmit signals to a first terminal of a transistor arranged in the integrated circuit chip, and the backside includes a backside power line configured to transmit power to a second terminal of the transistor. The semiconductor device further includes a contact configured to connect a gate of the transistor to a backside signal line configured to transmit signals to the gate of the transistor. The semiconductor device further includes a via extending through the frontside and the backside of the integrated circuit chip. The via is configured to transmit signals between a lowermost contact on the frontside and an uppermost contact on the backside of the integrated circuit chip.