FAST MATRIX MULTIPLICATION FOR BINARY AND TERNARY CONVOLUTIONAL NEURAL NETWORKS ON ARM CENTRAL PROCESSING UNIT
No computationally efficient CPU-oriented algorithms of ternary and ternary-binary convolution and/or matrix multiplication are available. Accordingly, a microkernel is disclosed for high-performance matrix multiplication of binary, ternary, and ternary-binary matrices for central processing units (...
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Zusammenfassung: | No computationally efficient CPU-oriented algorithms of ternary and ternary-binary convolution and/or matrix multiplication are available. Accordingly, a microkernel is disclosed for high-performance matrix multiplication of binary, ternary, and ternary-binary matrices for central processing units (CPUs) with the Advanced Reduced Instruction Set Computer (RISC) Machine (ARM) v8 architecture. |
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