Circuit and Method for Timestamp Jitter Reduction
A circuit and corresponding method generate a filtered timestamp. The circuit comprises recursive filter logic. The circuit generates the filtered timestamp from a received timestamp by filtering the received timestamp via the recursive filter logic. The recursive filter logic reduces jitter in the...
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Format: | Patent |
Sprache: | eng |
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Zusammenfassung: | A circuit and corresponding method generate a filtered timestamp. The circuit comprises recursive filter logic. The circuit generates the filtered timestamp from a received timestamp by filtering the received timestamp via the recursive filter logic. The recursive filter logic reduces jitter in the filtered timestamp relative to jitter of the received timestamp. The jitter represents a deviation of the received timestamp from a target (ideal) timestamp. The circuit outputs the filtered timestamp generated. The filtered timestamp is a more accurate representation of the target timestamp, relative to the received timestamp, due to the jitter reduced. |
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