METAL CAP FOR CONTACT RESISTANCE REDUCTION
A contact stack of a semiconductor device comprises: a source/drain region; a metal silicide layer above the source/drain region; a metal cap layer directly on the metal silicide layer; and a conductor on the metal cap layer. A method comprises: depositing a metal silicide layer in a feature of a su...
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| creator | Mebarki, Bencherki Kuratomi, Takashi Lee, Joung Joo Wu, Liqi Tang, Xianmin Hou, Wenting Gelatos, Avgerinos V Lei, Jianxin Hung, Raymond Hoiman Ha, Tae Hong |
| description | A contact stack of a semiconductor device comprises: a source/drain region; a metal silicide layer above the source/drain region; a metal cap layer directly on the metal silicide layer; and a conductor on the metal cap layer. A method comprises: depositing a metal silicide layer in a feature of a substrate; in the absence of an air break after the depositing of the metal silicide layer, preparing a metal cap layer directly on the metal silicide layer; and depositing a conductor on the metal cap layer. |
| format | Patent |
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| subjects | BASIC ELECTRIC ELEMENTS ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ELECTRICITY SEMICONDUCTOR DEVICES |
| title | METAL CAP FOR CONTACT RESISTANCE REDUCTION |
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