METAL CAP FOR CONTACT RESISTANCE REDUCTION

A contact stack of a semiconductor device comprises: a source/drain region; a metal silicide layer above the source/drain region; a metal cap layer directly on the metal silicide layer; and a conductor on the metal cap layer. A method comprises: depositing a metal silicide layer in a feature of a su...

Ausführliche Beschreibung

Gespeichert in:
Bibliographische Detailangaben
Hauptverfasser: Mebarki, Bencherki, Kuratomi, Takashi, Lee, Joung Joo, Wu, Liqi, Tang, Xianmin, Hou, Wenting, Gelatos, Avgerinos V, Lei, Jianxin, Hung, Raymond Hoiman, Ha, Tae Hong
Format: Patent
Sprache:eng
Schlagworte:
Online-Zugang:Volltext bestellen
Tags: Tag hinzufügen
Keine Tags, Fügen Sie den ersten Tag hinzu!
Beschreibung
Zusammenfassung:A contact stack of a semiconductor device comprises: a source/drain region; a metal silicide layer above the source/drain region; a metal cap layer directly on the metal silicide layer; and a conductor on the metal cap layer. A method comprises: depositing a metal silicide layer in a feature of a substrate; in the absence of an air break after the depositing of the metal silicide layer, preparing a metal cap layer directly on the metal silicide layer; and depositing a conductor on the metal cap layer.