ERROR DETECTION FOR PROGRAMMING SINGLE LEVEL CELLS
Methods, systems, and devices for error detection for programming single level cells of a memory system are described. The memory system may receive a write command for writing data to a block of memory cells and generate a write voltage to write the data to the block of memory cells. The memory sys...
Gespeichert in:
Hauptverfasser: | , |
---|---|
Format: | Patent |
Sprache: | eng |
Schlagworte: | |
Online-Zugang: | Volltext bestellen |
Tags: |
Tag hinzufügen
Keine Tags, Fügen Sie den ersten Tag hinzu!
|
Zusammenfassung: | Methods, systems, and devices for error detection for programming single level cells of a memory system are described. The memory system may receive a write command for writing data to a block of memory cells and generate a write voltage to write the data to the block of memory cells. The memory system may compare the write voltage to a reference voltage and determine whether the write voltage satisfies a threshold tolerance associated with the reference voltage. The memory system may generate signaling indicating an error associated with writing the data to the block of memory cells, based on determining that the write voltage does not satisfy the threshold tolerance. |
---|