SPIKING NEURAL NETWORK CIRCUIT AND SPIKING NEURAL NETWORK-BASED CALCULATION METHOD

A spiking neural network circuit implemented in a chip includes a plurality of decompression modules and a calculation module. The plurality of decompression modules are configured to obtain a plurality of weight values in a compressed weight matrix and identifiers of a plurality of corresponding output neurons based on information about a plurality of input neurons. Each of the plurality of decompression modules is configured to obtain weight values with a same row number in the compressed weight matrix and identifiers of a plurality of output neurons corresponding to the weight values with the same row number. Each row of the compressed weight matrix has a same quantity of non-zero weight values. Each row of weight values corresponds to one input neuron. The calculation module then determines corresponding membrane voltages of the plurality of output neurons based on the plurality of weight values.