MEMORY SYSTEM AND OPERATING METHOD THEREOF

A memory system includes: a main memory device configured to include a plurality of row lines; a cache memory device configured to include a plurality of cache lines for caching data stored in the row lines, each cache line including cache data, a row hammer state value for storing an access number...

Ausführliche Beschreibung

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Bibliographische Detailangaben
Hauptverfasser: HYUN, Sung Woo, KIM, Jae Hoon, KIM, Myoung Seo
Format: Patent
Sprache:eng
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Beschreibung
Zusammenfassung:A memory system includes: a main memory device configured to include a plurality of row lines; a cache memory device configured to include a plurality of cache lines for caching data stored in the row lines, each cache line including cache data, a row hammer state value for storing an access number of a corresponding row line, and an access selection bit set according to the row hammer state value; and a memory controller configured to control an access operation to be performed on one of the main memory device and the cache memory device, which is selected according to the access selection bit of a cache-hit cache line, in response to a request from a host.