SYSTEMS AND TECHNIQUES FOR JITTER REDUCTION

A device includes a clock input circuit that when in operation receives a clock signal and transmits an internal clock signal based on the clock signal. The device also includes an internal clock generator coupled to the clock input circuit to receive the internal clock signal, wherein the internal...

Ausführliche Beschreibung

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Bibliographische Detailangaben
Hauptverfasser: Gomm, Tyler J, Stave, Eric J
Format: Patent
Sprache:eng
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Beschreibung
Zusammenfassung:A device includes a clock input circuit that when in operation receives a clock signal and transmits an internal clock signal based on the clock signal. The device also includes an internal clock generator coupled to the clock input circuit to receive the internal clock signal, wherein the internal clock generator comprises clock adjustment circuitry that when in operation generates a phase controlled internal clock signal having subsequent clock edges based upon a single clock edge of the internal clock signal, wherein the phase controlled internal clock signal comprises a first frequency as a multiple of a second frequency of the internal clock signal.