OPTIMIZATION OF THE THERMAL PERFORMANCE OF THE 3D ICS UTILIZING THE INTEGRATED CHIP-SIZE DOUBLE-LAYER OR MULTI-LAYER MICROCHANNELS

A three-dimensional integrated circuit apparatus includes a three-dimensional integrated circuit including a group of integrated double-layer microchannels (DLMC) and multi-layer microchannels (MLMC) with optimized thermal performance for the three-dimensional integrated circuit.

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Bibliographische Detailangaben
Hauptverfasser: Vafai, Kambiz, Lu, Sainan
Format: Patent
Sprache:eng
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Beschreibung
Zusammenfassung:A three-dimensional integrated circuit apparatus includes a three-dimensional integrated circuit including a group of integrated double-layer microchannels (DLMC) and multi-layer microchannels (MLMC) with optimized thermal performance for the three-dimensional integrated circuit.