Memory Circuitry And Method Used In Forming Memory Circuitry

A method used in forming memory circuitry comprises forming a stack comprising vertically-alternating first tiers and second tiers, with the stack extending from a memory-array region into a stair-step region. The stair-step region comprises a flight of stairs in a first vertical cross-section along a first direction. Masking material is formed directly above the flight of stairs. A species is ion implanted into the masking material to form different-composition first and second regions that are directly above individual of the stairs along a second direction that is orthogonal to the first direction. One of the first and the second regions is removed selectively relative to the other of the first and the second regions. After the removing, the other of the first and second regions is used as a mask while etching through one of the first tiers and one of the second tiers in the individual stairs to form multiple different-depth treads in the individual stairs in a second vertical cross-section along the second direction. Other embodiments, including structure, are disclosed.