ONE-TIME PROGRAMMABLE (ROTP) NVM

In an embodiment, a method includes: receiving a first program bit address associated with a plurality of redundant bit addresses and a first transistor-based memory cell, where the plurality of redundant bit addresses are each associated with a respective transistor-based memory cell; providing a p...

Ausführliche Beschreibung

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Bibliographische Detailangaben
Hauptverfasser: Givant, Amichai, He, Yi, Sofer, Yair, Yogev, Yoav
Format: Patent
Sprache:eng
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Beschreibung
Zusammenfassung:In an embodiment, a method includes: receiving a first program bit address associated with a plurality of redundant bit addresses and a first transistor-based memory cell, where the plurality of redundant bit addresses are each associated with a respective transistor-based memory cell; providing a programing pulse to a first word line coupled to the first transistor-based memory cell to write a first write value to the first transistor-based memory cell; reading a first bit value from the first transistor-based memory cell; reading redundant bit values from transistor-based memory cells associated with the plurality of redundant bit addresses; when one of the first bit value and the redundant bit values do not match the first write value, determining a majority bit value based on the first bit value and on the redundant bit values; and asserting a flag signal when the majority bit value does not match the first write value.